The last several decades have seen enormous advances in the development of micro-devices manufactured on wafers, such as Si wafers or TiC wafers. For example very large scale integrated circuits manufactured on silicon wafers have found a wide range of used devices such as computers, cell phones toys and myriad other consumer and commercial applications. In, magnetic heads for use in tape and disk drive systems are constructed on wafers, which are generally constructed of TiC. Typically thousands of such devices have been constructed a single wafer.
Such wafers are often processed in tools such as plasma chambers and sputter deposition chambers, plating baths, etc., with several such wafers being processed simultaneously. Although a great deal of expense goes into the design and fabrication of such wafers, and vast amounts of capital are invested the tooling to process these wafers, it is the ability to manufacture many thousands of such devices simultaneously that allows these devices to manufactured at a very low cost per unit.
Over the last several decades, as more and more companies have entered the market, the price margins on such devices have become extremely tight. Any process that can increase manufacturing throughput has a large effect on the viability of such a product. As can be appreciated, since many thousands of devices are manufactured simultaneously in the wafers processed within such tools, a certain percentage of devices produced in these tools will, for one reason or another, fall outside of manufacturing specifications, requiring that those devices be rejected. For example, deposition rate in a sputter deposition chamber may vary over time as a result of one or more parameters of the tool changing over time. Manufacturers therefore, use feedback protocols to adjust such process parameters over time between batches as batch to batch testing indicates that an unacceptable number of produced devices pass inspection.
Conventional run-to-run process control makes adjustment based on batch average data, the within batch variations being generally ignored. However, many batch processes have inherent within batch variation, such as due to spatial effects within the processing tool. These batch processing tools include, for example, batch sputtering deposition chamber, chemical etching bath and vertical oxidation furnaces. Under such conditions the conventional run-to-run control makes bias prediction when spatial variation is present. The amount of estimation error from conventional run-to-run control depends on the magnitude of within batch variation, the batch size of each run and the placement of wafer in the batch. Furthermore, conventional run-to-run control does not utilize data feedback to minimize batch variation by optimizing wafer placement within the batch processing tool.
Furthermore, although such tools can process several wafers simultaneously, in many such tools operate with less than a full batch of wafers. By way of example, an ALCATEL-COMPTECH HEDA 2460 and 2480 ® alumina sputtering tool is a tool used in an alumina sputtering gap fill process. The tool is a batch processing tool with eight positions for wafer loading. The actual batch size of a run depends on wafer logistics in the manufacturing line. Only wafers that use the same processing recipe can be processed together within the batch. In a manufacturing environment having a high mix of wafer product types, batches are not always processed with full a full batch of eight wafers. Blanket wafers will be used to fill up the empty positions when there are less than eight product wafers that use the same recipe available.
As discussed above, current manufacturing techniques take into account batch-to-batch variations, but do not provide a means to monitor and minimize variations with a batch, such as from spatial arrangement within a tool. Therefore, there is strong felt need for a manufacturing process that can take into account within batch variations and provide a feedback mechanism to mitigate such variations. There also a strong felt need for such a process that can minimize within batch variations when less than a full batch of wafers is being processed.